Tri-level circuits are generally used in connection with various test circuitry within integrated circuit microprocessors and are seldom, if ever, used for communicating between integrated circuit chips. The advantage of such tri-level buffers is that test signals of one of three different voltage levels applied between circuit ground reference and single input test pin or pad connected to the tri-level buffer can produce one of several binary output signals for testing various functions of the associated parent circuitry.
Prior art tri-state test circuits employ a "floating input", and the circuitry tests the input to determine whether or not it is open circuited. Such tests require the circuitry to draw D.C. power from its associated parent circuitry. The tri-level input buffer to be described draws no power.